Dissertation Design and Analysis of On-Chip Interconnection Network for Multi-Processor System-on-Chip, University of California, Irvine, Dec. 2008. Book B.2 Veilog HDL: Digital System Design Using Verilog HDL, Seung Eun LEE Kwangmoonkag, March 2020. Book Chapter B.1 Chapter 9: Energy/Power Issues in Network-on-Chip (NoC), Seung Eun LEE and Nader Bagherzadeh, Network-on-Chips: Theory and Practice, CRC Press, March 2009. International Journals J.50 DL-Sort: A Hybrid Approach to Scalable Hardware-Accelerated Fully-Streaming Sorting Hyun Woo Oh, Joungmin Park and Seung Eun LEE IEEE Transactions on Circuits and Systems II: Express Briefs, Early Access, pp. 1-5, 2024. J.49 Accelerating Strawberry Ripeness Classification Using a Convolution-Based Feature Extractor along with an Edge AI Processor Joungmin Park, Jinyoung Shin, Raehyeong Kim, Seongmo An, Sangho Lee, Jinyeol Kim, Jongwon Oh, Youngwoo Jeong, Soohee Kim, Yue Ri Jeong, and Seung Eun LEE Electronics, Vol. 13, No. 344, Jan. 2024. J.48 Intelligent Monitoring System with Privacy Preservation Based on Edge AI Soohee Kim, Joungmin Park, Youngwoo Jeong, and Seung Eun LEE Micromachines, Vol. 14, No. 1749, Sep. 2023. J.47 The Design of Optimized RISC Processor for Edge Artificial Intelligence based on Custom Instruction Set Extension, Hyun Woo Oh and Seung Eun LEE IEEE Access, Vol. 11, May. 2023. J.46 Parallel Stochastic Computing Architecture for Computationally Intensive Applications, Jeongeun Kim, Won Sik Jeong, Youngwoo Jeong and Seung Eun LEE Electronics, Vol. 12, No. 7, Apr. 2023. J.45 Photoplethysmography-Based Distance Estimation for True Wireless Stereo, Youngwoo Jeong, Joungmin Park, Sun Beom Kwon and Seung Eun LEE Micromachines, Vol. 14, No. 2, Jan. 2023. J.44 An Edge AI Device based Intelligent Transportation System, Youngwoo Jeong, Hyun Woo Oh, Soohee Kim and Seung Eun LEE Journal of Information and Communication Convergence Engineering (JICCE), Vol. 20, No. 3, Sep. 2022. J.43 An FPGA-Based ECU for Remote Reconfiguration in Automotive Systems, Kwonneung Cho, Jeongeun Kim, Do Young Choi, Young Hyun Yoon, Jung Hwan Oh and Seung Eun LEE Micromachines, Vol. 12, No. 1309, Oct. 2021. J.42 Simulation-Based Fault Analysis for Resilient System-On-Chip Design, Chang Yeop Han, Yeong Seob Jeong, and Seung Eun LEE Journal of information and communication convergence engineering(JICCE), Vol. 19, No. 3, Sep. 2021. J.41 A Multi-Core Controller for an Embedded AI System Supporting Parallel Recognition, Suyeon Jang, Hyun Woo Oh, Young Hyun Yoon, Dong Hyun Hwang, Won Sik Jeong, and Seung Eun LEE Micromachines, Vol. 12, No. 852, July. 2021. J.40 ASimOV: A Framework for Simulation and Optimization of an Embedded AI Accelerator, Dong Hyun Hwang, Chang Yeop Han, Hyun Woo Oh, and Seung Eun LEE Micromachines, Vol. 12, No. 838, July. 2021. J.39 The Design of a 2D Graphics Accelerator for Embedded Systems, Hyun Woo Oh, Ji Kwang Kim, Gwan Beom Hwang, and Seung Eun LEE Electronics, Vol. 10, No. 4, Feb. 2021. J.38 Lossless Decompression Accelerator for Embedded Processor with GUI, Gwan Beom Hwang, Kwon Neung Cho, Chang Yeop Han, Hyun Woo Oh, Young Hyun Yoon, and Seung Eun LEE Micromachines, Vol. 12, No. 145, Jan. 2021. J.37 Energy Efficient and Low-Cost Server Architecture for Hadoop Storage Appliance, Do Young Choi, Jung Hwan Oh, Ji Kwang Kim, and Seung Eun LEE KSII Transactions on Internet and Information Systems (TIIS), Vol. 14, No. 12, Dec. 2020. J.36 Intellino: Processor for Embedded Artificial Intelligence, Young Hyun Yoon, Dong Hyun Hwang, Jun Hyeok Yang, and Seung Eun LEE Electronics, Vol. 9, No. 1169, July. 2020. J.35 Design of Low-Power SoC for Wearable Healthcare Device, Ji Kwang Kim, Jung Hwan Oh, Gwan Beom Hwang, Oh Seong Gwon, and Seung Eun LEE Journal of Circuits, Systems, and Computers (JCSC), Vol. 29, No. 6, May. 2020. J.34 Design of a 128-bit AES Block Cipher Core, Jung Hwan Oh, Sang Muk Lee, Young Hyun Yoon, and Seung Eun LEE Journal of Integrated Circuits and Systems (JICAS), Vol.03, No.4, pp.41-46, 2017. J.33 Design of Hardware Accelerator for Lempel-Ziv 4(LZ4) Compression, Sang Muk Lee, Ji Hoon Jang, Jung Hwan Oh, Ji Kwang Kim, and Seung Eun LEE IEICE Electronics Express (ELEX), 2017. J.32 Design of a DMA Controller for Loss-less Image Processing, Seong Mo Lee, Ji Hoon Jang, Sang Muk Lee, Jung Hwan Oh, and Seung Eun LEE Journal of Integrated Circuits and Systems (JICAS), Vol.02, No.2, pp.1-6, 2016. J.31 Intra-body Communication Modem on FPGA with AHB-Lite Bus Interface, Sang Don Kim, and Seung Eun LEE Journal of Applied Science and Engineering(JASE), Vol. 18, No. 4, pp.381-385, Dec. 2015. J.30 3D Interaction Glove: Virtual and Physical Space Realization Through Data Glove, Sang Muk Lee, Jung Woo Shin, Oh Seong Gwon, and Seung Eun LEE International Journal of Applied Engineering Research (IJAER), vol.10, no.17, pp.38354-38357, Oct. 2015. J.29 Sharing Computation Resources for Large-Scale Recognition System-on-Chip (SoC) Seung Eun LEE International Journal of Applied Engineering Research (IJAER), vol.10, no.17, pp.38066-38069, Oct. 2015. J.28 Survey of Fault-Injection Techniques for Resilient System-on-Chip Design, Yeong Seob Jeong, Seong Mo Lee, and Seung Eun LEE International Journal of Applied Engineering Research (IJAER), vol.10, no.17, pp.38377-38383, Oct. 2015. J.27 Little Core Based System on Chip Platform for Internet of Thing, Sang Don Kim, and Seung Eun LEE International Journal of Electrical and Computer Engineering (IJECE), vol.5, no.4, pp.695-700, Aug. 2015. J.26 A Scalable Large Format Display Based on Zero Client Processor, Sang Don Kim, and Seung Eun LEE International Journal of Electrical and Computer Engineering (IJECE), vol.5, no.4, pp.714-719, Aug. 2015. J.25 Implementation of Smart U-Health Care System, Yeong Seob Jeong, Yeong Ju Kwon, and Seung Eun LEE, Information Journal, vol.17, no.10(A), pp.4911-49916, Oct. 2014. J.24 Image Acquisition and Pre-Processing System for Single Photon Counting X-Ray Imaging, Sang Don Kim, Ki-Man jeon, Jae Gi Son, and Seung Eun LEE, Information Journal, vol.17, no.4, Apr. 2014. J.23 Deadlock-free XY-YX router for On-Chip Interconnection Network, Yeong Seob Jeong, and Seung Eun LEE, IEICE Electronics Express (ELEX), vol.10, no.20, pp.1-5, Oct. 2013. J.22 IPFM: Intelligent Pressure Foot-Mouse, Hyun-Min Choi, Yeong Seob Jeong, Seung-Jun Son, Jae Gi Son, and Seung Eun LEE, International Journal of Multimedia and Ubiquitous Engineering, vol.8, no.5, pp. 31-40, Sep., 2013. J.21 Multi-Energy X-Ray Imaging System Using Single Photon Counting, Sang Don Kim, and Seung Eun LEE, International Review on Computers and Software, vol.8, no.7, July, 2013. J.20 Environment for Single Photon Counting X-Ray Imaging System Design, Sang Don Kim, and Seung Eun LEE, International Journal on Information Technology, vol.1, no.4, pp.268-270, July, 2013. J.19 Reducing cache and TLB power by exploiting memory region and privilege level semantics, Zhen Fang, Li Zhao, Xiaowei Jiang, Shih-lien Lu, Ravi Iyer, Tong Li, and Seung Eun LEE, Journal of Systems Architecture, vol. 59, no.6, June, 2013. J.18 Accelerating Histograms of Oriented Gradients descriptor extraction for pedestrian recognition, Seung Eun LEE, Kyungwon Min, Taeweon Suh Computers and Electrical Engineering, vol. 39, no. 4, May, 2013. J.17 Adaptive Error Correction in Orthogonal Latin Square Codes for Low-Power, Resilient On-Chip Interconnection Network, Seung Eun LEE, Microelectronics Reliability, vol. 53, no.3, pp. 509-511, 2013. J.16 Reusing Existing Resources for Testing a Multi-Processor System-on-Chip, Seung Eun LEE, International Journal of Electronics, vol. 100, no.3, pp. 355-370, 2013. J.15 Pipelined CPU Design with FPGA in Teaching Computer Architecture, JongHyuk Lee, Seung Eun LEE, HeonChang Yu, and TaeWeon Suh, IEEE Trans. on Education, vol. 55, no. 3, Aug. 2012. J.14 CogniServe: Heterogeneous Server Architecture for Large-Scale Recognition, R. Iyer, S. Srinivasan, O. Tickoo, Z. Fang, R. Illikkal, S. Zhang, V. Chadha, P. Stillwell, and Seung Eun LEE, IEEE Micro, vol. 31, no. 3, pp. 20-31, May/June 2011. J.13 CoQoS: Coordinating QoS-Aware Shared Resources in NoC-Based SoCs, Bin Li, Li Zhao, Ravi Iyer, Li-Shiuan Peh, Michael Leddige, Michael Espig, Seung Eun LEE, and Donald Newell, Journal of Parallel and Distributed Computing, vol. 71, no.5, pp. 700-713 May 2011. J.12 Low Power and Resilient On-Chip Interconnection with Orthogonal Latin Squares, Seung Eun LEE, Yoon Seok yang, Wei Wu, Gwan S. Choi, and Ravi Iyer, IEEE Design & Test of Computers, vol. 28, no.2, pp. 16-29, Mar/Apr 2011. J.11 Area and Power-efficient Innovative Congestion-aware Network-on-Chip Architecture, Chifeng Wang, Wen-Hsiang Hu, Seung Eun LEE, and Nader Bagherzadeh, Journal of Systems Architecture, vol. 57, no. 1, pp. 24-38, Jan. 2011. J.10 Boomerang: Reducing Power Consumption of Response Packets in NoCs with Minimal Performance Impact, Zhen Fang, Erik G. Hallnor, Bin Li, Michael Leddige, Donglai Dai, Seung Eun LEE, Srihari makineni, and Ravi Iyer, IEEE Computer Architecture Letters, vol. 9, no. 2, July-Dec. 2010. J.9 Ray Tracing on a Networked Processor Array, Jungsook Yang, Seung Eun LEE, Chunyi Chen and Nader Bagherzadeh, International Journal of Electronics, vol. 97, no. 10, pp. 1193-1205, Oct. 2010. J.8 Parallel Processing for Block Ciphers on a Fault Tolerant Networkd Processor Array, Yoonseok Yang, Jun-Ho Bahn, Seung Eun LEE, Jungsook Yang and Nader Bagherzadeh, International Journal of High Performance Systems Architecture, vol. 2, no. 3-4, pp. 156-167, 2010. J.7 A High-level Power Model for Network-on-Chip (NoC) Router, Seung Eun LEE and Nader Bagherzadeh, Computers & Electrical Engineering, Elsevier, vol. 35, no. 6, pp. 837-845, Nov. 2009. J.6 A Variable Frequency Link for a Power-Aware Network-on-Chip (NoC), Seung Eun LEE and Nader Bagherzadeh, Integration-the VLSI Journal, Elsevier, vol. 42, no. 4, pp. 479-485, Sep. 2009. J.5 Clock Boosting Router: Increasing the Performace of an Adaptive Router in Network-on-Chip (NoC), Seung Eun LEE and Nader Bagherzadeh, Scientia Iranica, Vol. 15, No. 6, pp. 579 - 588, Dec. 2008. J.4 On Design and Application Mapping of A Network-on-Chip (NoC) Architecture, Jun Ho Bahn, Seung Eun LEE, Yoon seok Yang, Jungsook Yang, and Nader Bagherzadeh, Parallel Processing Letters (PPL), Vol. 18, Issue 2, pp. 239 - 255, June 2008. J.3 Design of a router for network-on-chip, Jun-Ho Bahn, Seung Eun LEE, and Nader Bagherzadeh, International Journal of High Performance Systems Architecture, Vol. 1, No.2 pp. 98 - 105, 2007. J.2 A 32-bit High Performance VLIW DSP for Software Defined Radio Applications, Seung Eun LEE and Yong-Mu JEONG, IEICE Transactions on Electronics, vol.E87-C, no.11, Nov. 2004. J.1 Development of a Novel Current Controlled Organic Light Emitting Diode (OLED), Seung Eun LEE, Won-Seok OH, Sung-Chul LEE, and Jong-Chan CHOI, IEICE Transactions on Electronics, Vol.E85-C,No.11,pp.1940-1944 ,Nov. 2002.
